The present disclosure relates to a signal receiving apparatus, a signal receiving method and a signal receiving program. More particularly, the present disclosure relates to a signal receiving apparatus compensating a received signal for distortions caused by nonlinearities so as to be capable of demodulating or decoding the received signal in a simpler way and at a higher speed in a digital-data transmission based on APSK (Amplitude Phase Shift Keying) modulation. The present disclosure also relates to a signal receiving method provided for the signal receiving apparatus and a signal receiving program implementing the signal receiving method.
In recent years, as information transmitted in a radio digital-data transmission diversifies and the amount of the transmitted information increases, APSK modulation having a better frequency utilization efficiency than the existing PSK (Phase Shift Keying) modulation is introduced. Typical examples of the radio digital-data transmission are digital broadcasting, which can be satellite broadcasting or ground-wave broadcasting, hand-phone communications and communications through a radio LAN (Local Area Network). In the case of the APSK modulation, however, the dynamic range of amplitude variations increases in comparison with the PSK modulation. Thus, effects of transmission-line distortions generated due to nonlinearities of a signal transmitting amplifier and a signal receiving amplifier become more striking.
As one of technologies provided on the signal receiving apparatus side to serve as a technology for compensating a received signal for distortions caused by nonlinearities, there have been known a method for detecting a phase error in carrier-wave synchronization and a method for computing likelihood in error correction decoding by taking an average signal point found after compensation of a signal for distortions caused by nonlinearities as a reference as is disclosed in interpretation A of the ARIB STD-B44. For more information on such a technology, the reader is advised to refer to documents such as http://www.arib.or.jp/tyosakenkyu/kikaku_hoso/hoso_std-b044.html.
The STD-B44 is a transmission standard of the advanced BS (broadband satellite) digital broadcasting. At the present day, the STD-B44 is the successor to the ARIB STD-B20 which is the BS digital broadcasting already put in service domestically. In the advanced BS digital broadcasting, a circular-type 16 APSK signal or a circular-type 32 APSK signal is newly adopted so as to implement a transmission at a capacity greater than the transmission according to the present standard. In addition, an LDPC (Low Density Parity Check) code is used as an error correction code in order to improve the transmission efficiency.
In the transmission format of the advanced BS digital broadcasting, for the purpose of compensating a received signal for distortions caused by nonlinearities for an APSK signal like ones mentioned above, a known series referred to as a transmitted signal point position signal is transmitted in a multiplexed way.
If 32 ASPK signal points of a transmitted signal are transmitted for example, in comparison with the originally expected transmitted signal point, the signal points of a received signal suffering from distortions caused by nonlinearities are distributed with a point of a shifted amplitude and/or a shifted phase serving as a distribution center. Thus, if hard determination and/or likelihood computation are carried out by taking the position of the originally expected transmitted signal point as an ideal signal point position, the performances of the carrier wave synchronization and/or the error correction decoding deteriorate considerably.
The transmitted signal point position signal cited above is transmitted by sequentially transmitting all signal points for the same modulation method as the transmitted main signal of the corresponding modulation slot in a known order. Thus, for every signal point, the signal receiving apparatus is capable of taking an average of the signals received during the corresponding period in order to obtain the position of the center point of a signal-point distribution suffering from distortions caused by nonlinearities. As a result, by carrying out the carrier wave synchronization and/or the error correction decoding by taking this position (which has been obtained in this way as the position of the center point of a signal-point distribution) as an ideal signal point, the received signal can be compensated for the distortions caused by nonlinearities.
The existing demodulation circuit applied to a signal receiving apparatus for the advanced BS digital broadcasting is configured as follows.
The existing demodulation circuit is configured to employ main sections including a carrier-wave synchronization circuit, a signal-point averaging circuit, a signal-point position table, a hard determiner, a phase-error detector, a likelihood computation section and an error correction decoder.
The carrier-wave synchronization circuit is configured as an ordinary digital PLL (Phase Locked Loop) circuit. The carrier-wave synchronization circuit carries out processing to synchronize the received signal to the frequency of the carrier waves and the phase of the waves so as to minimize the variances of a phase error detected by the phase-error detector.
For a synchronized detected signal output by the carrier-wave synchronization circuit, the signal-point averaging circuit computes an average of each of I and Q components of the transmitted signal point position signal for every signal point in order to generate signal point position information for all signal points.
The signal point position information generated by the signal-point averaging circuit is put in the signal-point position table serving as a table used for storing relations between signal-point coordinate positions on an IQ plane used for mapping an equal binary pattern and a multi-value binary pattern.
The hard determiner computes a boundary line on the IQ plane when hard determination is to be made on a signal point on the basis of the signal-point position table and carries out hard-determination processing based on the boundary line.
The phase-error detector finds a phase error between a hard-determination value output by the hard determiner and the synchronized detected signal in order to detect a phase error.
The likelihood computation section takes a signal-point position retrieved from the signal-point position table as an ideal signal point to compute an LLR (Log Likelihood Ratio) of each of bits composing the binary pattern mapped onto signal points.
The error correction decoder decodes LDPC codes on the basis of the LLRs, outputting decoding-result data.
Such a demodulation circuit is capable of carrying out carrier wave synchronization and error correction decoding to give rise to only fewer deteriorations even for a received signal with much shifted distributions of the amplitude of a signal point and the phase of the signal point due to distortions caused by nonlinearities.